Core: ARM^®32-bit Cortex^®-M0 CPU, frequency up to 48 MHz
Memories
- 64 to 128 Kbytes of Flash memory
- 16 Kbytes of SRAM with HW parity
CRC calculation unit
Reset and power management
- Digital and I/O supply: V_DD= 2.0 V to 3.6 V
- Analog supply: V_DDA= V_DDto 3.6 V
- Selected I/Os: V_DDIO2= 1.65 V to 3.6 V
- Power-on/Power down reset (POR/PDR)
- Programmable voltage detector (PVD)
- Low power modes: Sleep, Stop, Standby
- V_BATsupply for RTC and backup registers
Clock management
- 4 to 32 MHz crystal oscillator
- 32 kHz oscillator for RTC with calibration
- Internal 8 MHz RC with x6 PLL option
- Internal 40 kHz RC oscillator
- Internal 48 MHz oscillator with automatic trimming based on ext. synchronization
Up to 87 fast I/Os
- All mappable on external interrupt vectors
- Up to 68 I/Os with 5V tolerant capability and 19 with independent supply V_DDIO2
Seven-channel DMA controller
One 12-bit, 1.0 μs ADC (up to 16 channels)
- Conversion range: 0 to 3.6 V
- Separate analog supply: 2.4 V to 3.6 V
One 12-bit D/A converter (with 2 channels)

Two fast low-power analog comparators with programmable input and output
Up to 24 capacitive sensing channels for touchkey, linear and rotary touch sensors
Calendar RTC with alarm and periodic wakeup from Stop/Standby
12 timers
- One 16-bit advanced-control timer for six-channel PWM output
- One 32-bit and seven 16-bit timers, with up to four IC/OC, OCN, usable for IR control decoding or DAC control
- Independent and system watchdog timers
- SysTick timer
Communication interfaces
- Two I²C interfaces supporting Fast Mode Plus (1 Mbit/s) with 20 mA current sink, one supporting SMBus/PMBus and wakeup
- Four USARTs supporting master synchronous SPI and modem control, two with ISO7816 interface, LIN, IrDA, auto baud rate detection and wakeup feature
- Two SPIs (18 Mbit/s) with 4 to 16 programmable bit frames, and with I²S interface multiplexed
- CAN interface
- USB 2.0 full-speed interface, able to run from internal 48 MHz oscillator and with BCD and LPM support
HDMI CEC wakeup on header reception
Serial wire debug (SWD)
96-bit unique ID
All packages ECOPACK^®2

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Core: ARM^®32-bit Cortex^®-M0 CPU, frequency up to 48 MHz
Memories
- 64 to 128 Kbytes of Flash memory
- 16 Kbytes of SRAM with HW parity
CRC calculation unit
Reset and power management
- Digital and I/O supply: V_DD= 2.0 V to 3.6 V
- Analog supply: V_DDA= V_DDto 3.6 V
- Selected I/Os: V_DDIO2= 1.65 V to 3.6 V
- Power-on/Power down reset (POR/PDR)
- Programmable voltage detector (PVD)
- Low power modes: Sleep, Stop, Standby
- V_BATsupply for RTC and backup registers
Clock management
- 4 to 32 MHz crystal oscillator
- 32 kHz oscillator for RTC with calibration
- Internal 8 MHz RC with x6 PLL option
- Internal 40 kHz RC oscillator
- Internal 48 MHz oscillator with automatic trimming based on ext. synchronization
Up to 87 fast I/Os
- All mappable on external interrupt vectors
- Up to 68 I/Os with 5V tolerant capability and 19 with independent supply V_DDIO2
Seven-channel DMA controller
One 12-bit, 1.0 μs ADC (up to 16 channels)
- Conversion range: 0 to 3.6 V
- Separate analog supply: 2.4 V to 3.6 V
One 12-bit D/A converter (with 2 channels)

Two fast low-power analog comparators with programmable input and output
Up to 24 capacitive sensing channels for touchkey, linear and rotary touch sensors
Calendar RTC with alarm and periodic wakeup from Stop/Standby
12 timers
- One 16-bit advanced-control timer for six-channel PWM output
- One 32-bit and seven 16-bit timers, with up to four IC/OC, OCN, usable for IR control decoding or DAC control
- Independent and system watchdog timers
- SysTick timer
Communication interfaces
- Two I²C interfaces supporting Fast Mode Plus (1 Mbit/s) with 20 mA current sink, one supporting SMBus/PMBus and wakeup
- Four USARTs supporting master synchronous SPI and modem control, two with ISO7816 interface, LIN, IrDA, auto baud rate detection and wakeup feature
- Two SPIs (18 Mbit/s) with 4 to 16 programmable bit frames, and with I²S interface multiplexed
- CAN interface
- USB 2.0 full-speed interface, able to run from internal 48 MHz oscillator and with BCD and LPM support
HDMI CEC wakeup on header reception
Serial wire debug (SWD)
96-bit unique ID
All packages ECOPACK^®2

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